功率放大器匹配网络模拟动量

你可以发布你的布局/模型的截图吗？
PA匹配电路中的端口有点棘手，因为您可以轻松定义导致不良结果的错误端口配置。
为了获得匹配网络的正确结果，具有*端口宽度=晶体管端子宽度*非常重要。
只有这样，电流路径和产生的电感才能与真实电路相匹配。
这意味着内部（点）端口在这里不是很有用。
如果边缘的宽度与晶体管端子宽度匹配，则边缘上的端口将获得正确的结果*。
通常，您的布局没有晶体管端子宽度的单独边缘，因此您将手动将其添加到布局中。
不要只是将端口放在馈线边缘上，因为这与晶体管端子宽度不同，这种差异很重要！
使用端口校准（TML）。
根据需要移动参考平面，以便匹配晶体管数据的参考平面。



     以下为原文

  Can you post a screenshot of your layout/model?

Ports in PA matching circuits are a bit tricky, because you can easily define bad port configurations that lead to bad results. For correct results with matching networks, it is very important to have a *port width = transistor terminal width*. Only then, the current path and resulting inductance will match the real world circuit. 

This means that internal (point) ports are not very useful here.

With ports on the edge, you will get correct results *if* the width of the edge matches the transistor terminal width. Usually, your layout does not have a separate edge for the transistor terminal width, so you will to add this manually to your layout. Do not just place the port on the feedline edge, because that is different from the transistor terminal width, and that difference matters!

Use port calibration (TML). Shift the reference plane as needed, so that you match the reference plane of your transistor data.

附件

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你是什​​么意思“我没有模仿它。”
？
我假设是EM模拟这种布局？
布局是我写的类型。
P1的配置至关重要。
因此，来自P1的电流将跨越存根的中心宽度，这与您的硬件不同。
并且因为这是一个低阻抗点，结果中可以看到很小的差异。
我建议您添加一块带有晶体管端子宽度的非常短的金属片，并将端口放在该金属边缘上，使端口宽度=晶体管端子宽度。
这种金属可以（1）非常短 - 唯一的目的是确保从P1进入宽短截线的电流位于正确的位置。
（1）如果不移动参考平面，它必须*非常短。



     以下为原文

  What do you mean with " I did not simulate it." ? 
I assume that are EM simulating this layout? 

The layout is the type I was writing about. The configuration at P1 is critical. As is, the current from P1 will be across the entore width of the stub, which is different from your hardware. And because this a low impedance point, that small difference is visible in results.

I recommend that you add a very short piece of metal with the width of the transistor terminal, and place the port on that metal edge, so that port width = transistor terminal width. This metal can (1) be really short -- the only purpose is to make sure that the current from P1 into the wide stub is at the correct location. 

(1) If you don't shift the reference plane, it *must* be very short.

感谢您的回复。
实际上我实现了自己的匹配网络和刻录放大器。
所以我按照数据表匹配网络。
移动参考平面？
如果金属片的宽度是10mm（晶体管接头宽度），那么这件作品的长度是多少？
如果这件长度选择为1毫米，我需要将参考平面向内移动1毫米吗？



     以下为原文

  Thanks for reply.

Actually i implemented my own matching network and burned amplifier. So i followed the datasheet matching network.

Shifting the reference plane? if the width of metal piece is 10mm (transistor tab width ), then what is the proper length of this piece?
if the length of this piece is chosen to 1 mm do i need to shift the reference plane 1mm inwards?

如果端子宽度为10mm，则可以添加20mm的线长，然后将ref平面向后移20mm。
或者你可以绘制一条0.1毫米长的非常短的线并假设它很短 - >对于非常短的长度没有参考移位。
如果两种情况，Momentum的端口宽度将是10mm（=晶体管端子宽度），而不是完整的短截线宽度，效果将是相同的。
希望这有道理吗？



     以下为原文

  If the terminal width is 10mm, you can add 20mm of line length, and then shift back the ref plane by 20mm. 
Or you could draw a very short line with 0.1mm length and assume it is short -> no ref shift for that very short length.

The effect will be the same if both cases, that the port width for Momentum will be 10mm (=transistor terminal width), instead of the full stub width.

Hope this makes sense?

感谢您的回复。
我已经模拟了两种情况，一种是终端宽度为10mm，长度为20mm，然后将ref平面向后移动20mm。
第二个，端子宽度为10mm，长度为0.1mm，没有ref换档。
两者产生几乎相同的结果。
什么端口类型用于匹配电容器和射频连接器？



     以下为原文

  Thanks for reply.

I have simulated both scenario, one with the  terminal width of  10mm, and length 20mm and then shift back the ref plane by 20mm. second one with  terminal width is 10mm, and length 0.1mm length and  no ref shift for that. Both produce almost same results.

What port type is used for matching capacitors and rf connector?

“最佳”端口配置是表示硬件中实际电流的配置。
如果硬件中的连接是“点”类型，在金属平面内的某个位置，则可以在金属平面内放置Momentum端口。
这将创建一个带有“点”连接的未校准端口。
这种“点”连接产生的额外不连续性/额外电感包含在结果中。
如果硬件中的连接更“线”类型，则可以将Momentum端口放在线/多边形的边缘上。
这些端口具有沿整个边缘的电流，并且可以被校准。



     以下为原文

  The "best" port configuration is the configuration that represents the real current flow in your hardware. 

If your connection in the hardware is of "point" type, somewhere inside a metal plane, you can place a Momentum port inside the metal plane. This will create an uncalibrated port with a "point" connection. The extra discontinuity/extra inductance created by such "point" connection is included in the results then.

If your connection in the hardware is more "line" type, you can place the Momentum port on the edge of a line/polygon. These ports have current flow along the entire edge, and can be calibrated.

在上一篇文章中，您建议添加一条宽度等于晶体管引线宽度的传输线，并根据它移动参考平面。
这个增加的传输线将保留在真正的pcb中？
或者它仅用于模拟目的？
问候



     以下为原文

  In the last post you suggested  to add a transmission line with width equal to the width of transistor leads and to shift the reference plane according to it.

This added  transmission line will remain in the real pcb ? or it is for only simulation purpose?

Regards

> {quote：title = adnan写道：} {quote}>这个增加的传输线将保留在真正的pcb中？
或者它仅用于模拟目的？
它仅用于模拟，以确保端口宽度=晶体管端子宽度。



     以下为原文

  > {quote:title=adnan wrote:}{quote}
> This added  transmission line will remain in the real pcb ? or it is for only simulation purpose?

It is only for simulation, to ensure port width = transistor terminal width.

非常感谢。



     以下为原文

  Thanks a lot.