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例程如下:
用的是4M的晶振,比特率250Kbps #include #define uchar unsigned char #define uint unsigned int #pragma config OSC = XT // Oscillator Selection bits (XT oscillator) #pragma config OSCS = OFF // Oscillator System Clock Switch Enable bit (Oscillator system clock switch option is disabled (main oscillator is source)) // CONFIG2L #pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled) #pragma config BOR = OFF // Brown-out Reset Enable bit (Brown-out Reset disabled) #pragma config BORV = 25 // Brown-out Reset Voltage bits (VBOR set to 2.5V) // CONFIG2H #pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit)) #pragma config WDTPS = 128 // Watchdog Timer Postscale Select bits (1:128) // CONFIG4L #pragma config STVR = OFF // Stack Full/Underflow Reset Enable bit (Stack Full/Underflow will not cause Reset) #pragma config LVP = OFF // Low-Voltage ICSP Enable bit (Low-Voltage ICSP disabled) // CONFIG5L #pragma config CP0 = OFF // Code Protection bit (Block 0 (000200-001FFFh) not code protected) #pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code protected) #pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code protected) #pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code protected) // CONFIG5H #pragma config CPB = OFF // Boot Block Code Protection bit (Boot Block (000000-0001FFh) not code protected) #pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code protected) // CONFIG6L #pragma config WRT0 = OFF // Write Protection bit (Block 0 (000200-001FFFh) not write protected) #pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write protected) #pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write protected) #pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write protected) // CONFIG6H #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write protected) #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0001FFh) not write protected) #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write protected) // CONFIG7L #pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks) #pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks) #pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks) #pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks) // CONFIG7H #pragma config EBTRB = OFF uint CAN_FLAG; void initcan() { TRISB=TRISB&0xFB; CANCON=0X80; while((CANSTAT&0X80)==0){;} BRGCON1=0X01; BRGCON2=0X90; BRGCON3=0X42; TXB0SIDH=0XFF; TXB0SIDL=0XE0; TXB0CON=0X03; TXB0DLC=0X08; TXB0D0=0X00; TXB0D1=0X01; TXB0D2=0X02; TXB0D3=0X03; TXB0D4=0X04; TXB0D5=0X05; TXB0D6=0X06; TXB0D7=0X07; RXB0SIDH=0XFF; RXB0SIDL=0XE0; RXB0CON=0X20; RXB0DLC=0X08; RXF0SIDH=0XFF; RXF0SIDL=0XE0; RXM0SIDH=0X00; RXM0SIDL=0X00; CANCON=0X00; while((CANSTAT&0XE0)!=0); PIR3=0X00; PIE3=0X01; IPR3=0X01; } void CAN_send() { TXB0CONbits.TXREQ=0; TXB0D0=0x00; TXB0D1=0x01; TXB0D2=0X02; TXB0D3=0X03; TXB0D4=0X04; TXB0D5=0X05; TXB0D6=0X06; TXB0D7=0X07; TXB0CONbits.TXREQ=1; while(TXB0CONbits.TXREQ==1); } void interrupt HI_SR() { if( RXB0IF==1) { CAN_FLAG=1; PORTD=0xff; RXB0IF=0; RXB0CONbits.RXFUL=0; } } void main() { initcan(); IPEN=1; INTCON=0xc0; TXB0CONbits.TXREQ=0; RXB0CONbits.RXFUL=0; TRISD=0; PORTD=0xff; while(1) { CAN_send(); } }
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