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本帖最后由 lee_st 于 2018-4-20 07:35 编辑
今天抽时间搞明白了双核的中断通信方式,在此感谢之前研究过的兄弟们,
下面我就自己的感悟分享给大家,算是给初学者指路。如有雷同,纯属巧合。。。。
双核mailbox通信,采用互斥锁机制共享变量,同一时刻只能有一个核心访问这个变量,不用担心变量被篡改了。
还是在昨天研究的hello_world的基础上更改,先上图,是今天实现的成果。
下面开始一一道来。
首先在M4和M0+核的代码里添加#include "fsl_mailbox.h"
定义变量
volatile uint32_t g_msg=0; 在初始化都要加
/* Init Mailbox */
MAILBOX_Init(MAILBOX);
/* Enable mailbox interrupt */
NVIC_EnableIRQ(MAILBOX_IRQn);
看了就明白了
然后在M4里添加
void MAILBOX_IRQHandler()
{
g_msg = MAILBOX_GetValue(MAILBOX, kMAILBOX_CM4);
PRINTF("Read value from CM4 mailbox register: %dn", g_msg);
g_msg++;
PRINTF("Write to CM0+ mailbox register: %dn", g_msg);
MAILBOX_SetValue(MAILBOX, kMAILBOX_CM0Plus, g_msg);
MAILBOX_ClearValueBits(MAILBOX, kMAILBOX_CM4, 0xffffffff);
}
main函数添加
/* Boot source for Core 1 from flash */
SYSCON->CPBOOT = SYSCON_CPBOOT_BOOTADDR(*(uint32_t *)((uint8_t *)CORE1_BOOT_ADDRESS + 0x4));
SYSCON->CPSTACK = SYSCON_CPSTACK_STACKADDR(*(uint32_t *)CORE1_BOOT_ADDRESS);
int32_t temp = SYSCON->CPCTRL;
temp |= 0xc0c48000;
SYSCON->CPCTRL = (temp | SYSCON_CPCTRL_CM0RSTEN_MASK);
SYSCON->CPCTRL = (temp);
MAILBOX_SetValue(MAILBOX, kMAILBOX_CM0Plus, g_msg);
上面代码实现设置M4内核为主,M0+为slave
在M0+添加
void MAILBOX_IRQHandler()
{
g_msg = MAILBOX_GetValue(MAILBOX, kMAILBOX_CM0Plus);
g_msg++;
MAILBOX_SetValue(MAILBOX, kMAILBOX_CM4, g_msg);
MAILBOX_ClearValueBits(MAILBOX, kMAILBOX_CM0Plus, 0xffffffff);
}
编译,下载即可运行
fsl_mailbox.h里面主要定义一些通信函数
/*!
* @brief Initializes the MAILBOX module.
*
* This function enables the MAILBOX clock only.
*
* @param base MAILBOX peripheral base address.
*/
static inline void MAILBOX_Init(MAILBOX_Type *base)
{
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
CLOCK_EnableClock(kCLOCK_Mailbox);
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
}
/*!
* @brief De-initializes the MAILBOX module.
*
* This function disables the MAILBOX clock only.
*
* @param base MAILBOX peripheral base address.
*/
static inline void MAILBOX_Deinit(MAILBOX_Type *base)
{
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
CLOCK_DisableClock(kCLOCK_Mailbox);
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
}
/* @} */
/*!
* @brief Set data value in the mailbox based on the CPU ID.
*
* @param base MAILBOX peripheral base address.
* @param cpu_id CPU id, kMAILBOX_CM0Plus is M0+ or kMAILBOX_CM4 is M4.
* @param mboxData Data to send in the mailbox.
*
* @note Sets a data value to send via the MAILBOX to the other core.
*/
static inline void MAILBOX_SetValue(MAILBOX_Type *base, mailbox_cpu_id_t cpu_id, uint32_t mboxData)
{
assert((cpu_id == kMAILBOX_CM0Plus) || (cpu_id == kMAILBOX_CM4));
base->MBOXIRQ[cpu_id].IRQ = mboxData;
}
/*!
* @brief Get data in the mailbox based on the CPU ID.
*
* @param base MAILBOX peripheral base address.
* @param cpu_id CPU id, kMAILBOX_CM0Plus is M0+ or kMAILBOX_CM4 is M4.
*
* @return Current mailbox data.
*/
static inline uint32_t MAILBOX_GetValue(MAILBOX_Type *base, mailbox_cpu_id_t cpu_id)
{
assert((cpu_id == kMAILBOX_CM0Plus) || (cpu_id == kMAILBOX_CM4));
return base->MBOXIRQ[cpu_id].IRQ;
}
/*!
* @brief Set data bits in the mailbox based on the CPU ID.
*
* @param base MAILBOX peripheral base address.
* @param cpu_id CPU id, kMAILBOX_CM0Plus is M0+ or kMAILBOX_CM4 is M4.
* @param mboxSetBits Data bits to set in the mailbox.
*
* @note Sets data bits to send via the MAILBOX to the other core. A value of 0 will
* do nothing. Only sets bits selected with a 1 in it's bit position.
*/
static inline void MAILBOX_SetValueBits(MAILBOX_Type *base, mailbox_cpu_id_t cpu_id, uint32_t mboxSetBits)
{
assert((cpu_id == kMAILBOX_CM0Plus) || (cpu_id == kMAILBOX_CM4));
base->MBOXIRQ[cpu_id].IRQSET = mboxSetBits;
}
/*!
* @brief Clear data bits in the mailbox based on the CPU ID.
*
* @param base MAILBOX peripheral base address.
* @param cpu_id CPU id, kMAILBOX_CM0Plus is M0+ or kMAILBOX_CM4 is M4.
* @param mboxClrBits Data bits to clear in the mailbox.
*
* @note Clear data bits to send via the MAILBOX to the other core. A value of 0 will
* do nothing. Only clears bits selected with a 1 in it's bit position.
*/
static inline void MAILBOX_ClearValueBits(MAILBOX_Type *base, mailbox_cpu_id_t cpu_id, uint32_t mboxClrBits)
{
assert((cpu_id == kMAILBOX_CM0Plus) || (cpu_id == kMAILBOX_CM4));
base->MBOXIRQ[cpu_id].IRQCLR = mboxClrBits;
}
这些都有说明,不多说
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